Datasheet Summary
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Features
Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle Execution 100 MFLOPS Peak, 66 MFLOPS Sustained Performance 1024-Point plex FFT Benchmark: 0.58 ms Divide (y/x): 180 ns Inverse Square Root (1/√x ): 270 ns 32-Bit Single-Precision and 40-Bit Extended-Precision IEEE Floating-Point Data Formats 32-Bit Fixed-Point Formats, Integer and Fractional, with 80-Bit Accumulators IEEE Exception Handling with Interrupt on Exception Three Independent putation Units: Multiplier, ALU, and Barrel Shifter Dual Data Address Generators with Indirect, Immediate,...