AZ10ELT22 Overview
2 The AZ10/100ELT22 is a dual 3 CMOS/TTL to differential PECL 4 translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline packaging and the low skew, dual gate design of the ELT22 makes it ideal for applications that require the translation of a clock and a data signal.
AZ10ELT22 Key Features
- 0.5ns Typical Propagation Delay
- <100ps Typical Output to Output Skew
- Differential PECL Outputs
- Flow Through Pinouts
- Operating Range of 3.0V to 5.5V
- Direct Replacement for ON Semiconductor MC10ELT22 & MC100ELT22
- IBIS Model Files Available on Arizona Microtek Website
- PACKAGE