MT4C4001J Datasheet 1 MEG x 4 DRAM Fast Page Mode DRAM

Manufacturer: Austin Semiconductor

MT4C4001J 1 meg x 4 dram fast page mode dram by Austin Semiconductor - Datasheet Preview

Datasheet Details

Part number	MT4C4001J
Manufacturer	Austin Semiconductor
File Size	276.87 KB
Description	1 MEG x 4 DRAM Fast Page Mode DRAM
Download	MT4C4001J Download (PDF)

General Description

The MT4C4001J is a randomly accessed solid-state memory containing 4,194,304 bits organized in a x4 configuration.

During READ or WRITE cycles each bit is uniquely addressed through the 20 address bits which are entered 10 bits (A0-A9) at a time.

RAS is used to latch the first 10 bits and CAS the later 10 bits.

Overview

DRAM Austin Semiconductor, Inc.

1 MEG x 4 DRAM Fast Page Mode DRAM AVAILABLE AS MILITARY SPECIFICATIONS • SMD 5962-90847 • MIL-STD-883 DQ1 DQ2 WE RAS A9 A0 A1 A2 A3 Vcc 1 2 3 4 5 6 7 8 9 10 20-Pin DIP (C, CN).

Key Features

Industry standard x4 pinout, timing, functions, and packages.
High-performance, CMOS silicon-gate process.
Single +5V±10% power supply.
Low-power, 2.5mW standby; 300mW active, typical.
All inputs, outputs, and clocks are fully TTL and CMOS compatible.
1,024-cycle refresh distributed across 16ms.
Refresh modes: RAS-ONLY, CAS-BEFORE-RAS (CBR), and HIDDEN.
FAST PAGE MODE access cycle.
CBR with WE a HIGH (JEDEC test mo.

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