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HCPL-7723 Datasheet Preview

HCPL-7723 Datasheet

50 MBd 2 ns PWD High Speed CMOS Optocoupler

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HCPL-7723/0723
50 MBd 2 ns PWD High Speed CMOS Optocoupler
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Available in either 8-pin DIP or SO‑8 package style respec-
tively, the HCPL-7723 or HCPL-0723 optocoupler utilize
the latest CMOS IC technology to achieve outs­tanding
speed performance of minimum 50 MBd data rate and
2 ns maximum pulse width distortion.
Basic building blocks of HCPL-7723/0723 are a CMOS
LED driver IC, a high speed LED and a CMOS detector
IC. A CMOS logic input signal controls the LED driver
IC, which supplies current to the LED. The detector
IC incorporates an integrated photodiode, a high speed
transimpedance amplifier, and a voltage comparator with
an output driver.
Functional Diagram
**VDD1 1
8 VDD2**
Features
• +5 V CMOS compatibility
• High speed: 50 MBd min.
• 2 ns max. pulse width distortion
• 22 ns max. prop. delay
• 16 ns max. prop. delay skew
• 10 kV/µs min. common mode rejection
• –40 to 85°C temperature range
• Safety and regulatory approvals:
UL recognized
– 5000 Vrms for 1 min. per UL1577 for HCPL-7723 for
option 020
– 3750 Vrms for 1 min. per UL1577 for HCPL-0723
CSA component acceptance notice #5
IEC/EN/DIN EN 60747-5-5
– Viorm = 630 Vpeak for HCPL-7723   option 060
– Viorm = 567 Vpeak for HCPL-0723   option 060
VI 2
NC* 3
GND1 4
LED1
SHIELD
7 NC*
IO
6 VO
5 GND2
* PIN 3 IS THE ANODE OF THE INTERNAL LED AND MUST BE LEFT
UNCONNECTED FOR GUARANTEED DATASHEET PERFORMANCE.
PIN 7 IS NOT CONNECTED INTERNALLY.
** A 0.1 µF BYPASS CAPACITOR MUST BE CONNECTED BETWEEN
PINS 1 AND 4, AND 5 AND 8.
TRUTH TABLE
(POSITIVE LOGIC)
VI, INPUT
H
L
LED1
OFF
ON
VO, OUTPUT
H
L
Applications
• Digital fieldbus isolation: CC-Link, DeviceNet, Profibus,
SDS, Isolated A/D or D/A conversion
• Multiplexed data transmission
• High speed digital input/output
• Computer peripheral interface
• Microprocessor system interface
CAUTION: It is advised that normal static precautions be taken in handling and assembly of
this component to prevent damage and/or degradation, which may be induced by ESD.




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HCPL-7723 Datasheet Preview

HCPL-7723 Datasheet

50 MBd 2 ns PWD High Speed CMOS Optocoupler

No Preview Available !

Package Outline Drawings
HCPL-7723 8-Pin DIP Package
9.65 ± 0.25
(0.380 ± 0.010)
TYPE NUMBER
87
65
A XXXXV
YYWW
OPTION 060 CODE*
DATE CODE
1.19 (0.047) MAX.
12 34
1.78 (0.070) MAX.
3.56 ± 0.13
(0.140 ± 0.005)
4.70 (0.185) MAX.
7.62 ± 0.25
(0.300 ± 0.010)
6.35 ± 0.25
(0.250 ± 0.010)
5° TYP.
0.254
+ 0.076
- 0.051
(0.010
+ 0.003)
- 0.002)
1.080 ± 0.320
(0.043 ± 0.013)
0.51 (0.020) MIN.
2.92 (0.115) MIN.
0.65 (0.025) MAX.
2.54 ± 0.25
(0.100 ± 0.010)
DIMENSIONS IN MILLIMETERS AND (INCHES).
*OPTION 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
2


Part Number HCPL-7723
Description 50 MBd 2 ns PWD High Speed CMOS Optocoupler
Maker Avago
Total Page 12 Pages
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