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AFE1230 - G.SHDSL ANALOG FRONT-END

Download the AFE1230 datasheet PDF. This datasheet also covers the AFE1230-Burr variant, as both devices belong to the same g.shdsl analog front-end family and are provided as variant models within a single manufacturer datasheet.

Description

Texas Instrument’s analog front-end chip, the AFE1230, is designed to greatly reduce the size and cost of G.SHDSL and HDSL2 application designs.

It provides a transceiver as the line interface between the Digital Signal Processor (DSP) and the local loop.

Features

  • q E1, T1, AND.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (AFE1230-Burr-BrownCorporation.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Burr-Brown (Texas Instruments)

Part Number Description
AFE1203 2Mbps/ Single Pair HDSL ANALOG FRONT END
AFE1205 2Mbps/ Single Pair HDSL ANALOG FRONT END
AFE1224 2Mbps/ Single Pair ANALOG FRONT END
AFE1103 HDSL/MDSL ANALOG FRONT END
AFE1104E HDSL/MDSL ANALOG FRONT END

Full PDF Text Transcription

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AFE1230 AFE1230 SBWS015A – AUGUST 2001 G.SHDSL ANALOG FRONT-END FEATURES q E1, T1, AND SUBRATE OPERATION q COMPLIES WITH G.SHDSL AND HDSL2 q 16-BIT, DELTA-SIGMA CONVERTERS q ON-CHIP DRIVER AND PGA q PROGRAMMABLE tx AND rx FILTERS q SERIAL DIGITAL INTERFACE q 750mW POWER DISSIPATION AT E1 q +5V POWER (5V OR 3.3V DIGITAL) q SSOP-28 PACKAGE q –40°C TO +85°C TEMPERATURE RANGE DESCRIPTION Texas Instrument’s analog front-end chip, the AFE1230, is designed to greatly reduce the size and cost of G.SHDSL and HDSL2 application designs. It provides a transceiver as the line interface between the Digital Signal Processor (DSP) and the local loop. The AFE1230 is designed to handle upstream and downstream data transmission over a wide range of data rates from 64kbps to 2.5Mbps.
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