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MPS6530 - MEMORY / TIMER ARRAY

General Description

The 6530 is designed to operate in conjunction with the 650X Microprocessor Family.

Key Features

  • 8 bit bi-directional Data Bus for direct communication with the microprocessor.
  • 1024 x 8 ROM.
  • 64 x 8 static RAM.
  • Two 8 bit bi-directional data ports for interface to peripherals.
  • Two programmable I/O Peripheral Data Direction Registers.
  • Programmable Interval Timer.
  • Programmable Interval Timer Interrupt.
  • TTL & CMOS compatible peripheral lines.
  • Peripheral pins with Direct Transistor Drive Capability.
  • High Im.

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Datasheet Details

Part number MPS6530
Manufacturer Commodore
File Size 441.34 KB
Description MEMORY / TIMER ARRAY
Datasheet download datasheet MPS6530 Datasheet

Full PDF Text Transcription for MPS6530 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for MPS6530. For precise diagrams, and layout, please refer to the original PDF.

,..,commodore ~ semiconductor group ~~@~ MPS 6530 MEMORY, I/O, TIMER ARRAY 6530 (MEMORY, I/O, TIMER ARRAY) DESCRIPTION The 6530 is designed to operate in conjunction with...

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ARRAY) DESCRIPTION The 6530 is designed to operate in conjunction with the 650X Microprocessor Family. It is comprised of a mask programmable 1024 x8 ROM,a 64x8 static RAM, two software controlled 8bit bi-directional data ports allowing direct interfacing between the microprocessor unit and peripheral devices, and a software programmable interval timer with interrupt, capable of timing in various intervals from 1 to 262,144 clock periods.