Download the CY7C018 datasheet PDF.
This datasheet also covers the CY7C008 variant, as both devices belong to the same 64k/128k x 8/9 dual-port static ram family and are provided as variant models within a single manufacturer datasheet.
Key Features
True Dual-Ported memory cells which allow simultaneous access of the same memory location.
64K x 8 organization (CY7C008).
128K x 8 organization (CY7C009).
64K x 9 organization (CY7C018).
128K x 9 organization (CY7C019).
0.35-micron CMOS for optimum speed/power.
High-speed access: 12[1]/15/20 ns.
Low operating power.
Active: ICC = 180 mA (typical).
Standby: ISB3 = 0.05 mA (typical)
Logic Block Diagram
R/.
Full PDF Text Transcription for CY7C018 (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
CY7C018. For precise diagrams, and layout, please refer to the original PDF.
25/0251 CY7C008/009 CY7C018/019 Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 64K x 8 organization (CY7C008) • 12...
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cess of the same memory location • 64K x 8 organization (CY7C008) • 128K x 8 organization (CY7C009) • 64K x 9 organization (CY7C018) • 128K x 9 organization (CY7C019) • 0.35-micron CMOS for optimum speed/power • High-speed access: 12[1]/15/20 ns • Low operating power — Active: ICC = 180 mA (typical) — Standby: ISB3 = 0.
CY7C018 Datasheet
