PSoC4100
Description
PSoC® 4 is a scalable and reconfigurable platform architecture for a family of mixed-signal programmable embedded system controllers with an Arm® Cortex™-M0 CPU. It combinesArm programmable and reconfigurable analog and digital blocks with flexible automatic routing.
Key Features
- 24-MHz Arm Cortex-M0 CPU with single-cycle multiply
- Up to 32 kB of flash with Read Accelerator
- Up to 4 kB of SRAM Programmable Analog
- Two opamps with reconfigurable high-drive external and high-bandwidth internal drive and Comparator modes and ADC input buffering capability
- 12-bit 806 ksps SAR ADC with differential and single-ended modes and Channel Sequencer with signal averaging
- Two current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin
- Two low-power comparators that operate in Deep Sleep Low Power 1.71-V to 5.5-V operation
- 20-nA Stop Mode with GPIO pin wakeup
- Hibernate and Deep Sleep modes allow wakeup-time versus power trade-offs Capacitive Sensing
- Cypress CapSense Sigma-Delta (CSD) provides best-in-class SNR (>5:1) and water tolerance
