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Cypress Semiconductor Electronic Components Datasheet

CY14E101I Datasheet

1-Mbit (128 K x 8) Serial (I2C) nvSRAM

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CY14C101I
CY14B101I
CY14E101I
1-Mbit (128 K × 8) Serial (I2C) nvSRAM
with Real Time Clock
1-Mbit (128 K × 8) Serial (I2C) nvSRAM with Real Time Clock
Features
1-Mbit nonvolatile static random access memory (nvSRAM)
Internally organized as 128 K × 8
SauTtOomREatictaollyQounanptouwmeTrr-adpownnon(AvuotlaotSilteoree)leomr ebnytsusininitgiaIt2eCd
command (Software STORE) or HSB pin (Hardware STORE)
RECALL
RECALL)
to
or
bySIR2CAMcominmitaiantedd(SoofntwaproewReEr-CuApLL(P) ower-Up
Automatic STORE on power-down with a small capacitor
High reliability
Infinite read, write, and RECALL cycles
1 million STORE cycles to QuantumTrap
Data retention: 20 years at 85C
Real Time Clock (RTC)
Full-featured RTC
Watchdog timer
Clock alarm with programmable interrupts
Backup power fail indication
Square wave output with programmable frequency (1 Hz,
512 Hz, 4096 Hz, 32.768 kHz)
Capacitor or battery backup for RTC
Backup current of 0.45 µA (typical)
High-speed I2C interface[1]
Industry standard 100 kHz and 400 kHz speed
Fast mode Plus: 1 MHz speed
High speed: 3.4 MHz
Zero cycle delay reads and writes
Write protection
Hardware protection using Write Protect (WP) pin
Software block protection for 1/4, 1/2, or entire array
I2C access to special functions
Nonvolatile STORE/RECALL
8-byte serial number
Manufacturer ID and Product ID
Sleep mode
Low power consumption
Average active current of 1 mA at 3.4 MHz operation
Average standby mode current of 250 µA
Sleep mode current of 8 µA
Industry standard configurations
Operating voltages:
• CY14C101I: VCC = 2.4 V to 2.6 V
• CY14B101I: VCC = 2.7 V to 3.6 V
• CY14E101I: VCC = 4.5 V to 5.5 V
Industrial temperature
16-pin small outline integrated circuit (SOIC) package
Restriction of hazardous substances (RoHS) compliant
Overview
The Cypress CY14C101I/CY14B101I/CY14E101I combines a
1-Mbit nvSRAM[2] with a full-featured RTC in a monolithic
integrated circuit with serial I2C interface. The memory is
organized as 128 K words of 8 bits each. The embedded
nonvolatile elements incorporate the QuantumTrap technology,
creating the world’s most reliable nonvolatile memory. The
SRAM provides infinite read and write cycles, while the
QuantumTrap cells provide highly reliable nonvolatile storage of
data. Data transfers from SRAM to the nonvolatile elements
(STORE operation) take place automatically at power-down. On
power-up, data is restored to the SRAM from the nonvolatile
memory (RECALL operation). The STORE and RECALL
operations can also be initiated by the user through I2C
commands.
For a complete list of related documentation, click here.
Logic Block Diagram
SDA
SCL
A2, A1
WP
VCC VCAP VRTCcap VRTCbat
Power Control
Block
Sleep
Serial Number
8x8
Manufacturer ID /
Product ID
Memory Control Register
Command Register
2
I C Control Logic
Slave Address
Decoder
Control Registers Slave
Memory Slave
RTC Slave
Memory
Address and Data
Control
Quantum Trap
128 K x 8
SRAM
128 K x 8
STORE
RECALL
X in
INT/SQW
Xout
RTC Control Logic
Registers
Counters
Notes
1. The I2C nvSRAM is a single solution which is usable for all four speed modes of operation. As a result, some I/O parameters are slightly different than those on
chips which support only one mode of operation. Refer to AN87209 for more details.
2. Serial (I2C) nvSRAM will be referred to as nvSRAM throughout the datasheet.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-54391 Rev. *M
• San Jose, CA 95134-1709 • 408-943-2600
Revised November 5, 2014


Cypress Semiconductor Electronic Components Datasheet

CY14E101I Datasheet

1-Mbit (128 K x 8) Serial (I2C) nvSRAM

No Preview Available !

CY14C101I
CY14B101I
CY14E101I
Contents
Pinout ................................................................................ 3
Pin Definitions .................................................................. 3
I2C Interface ...................................................................... 4
Protocol Overview ............................................................ 4
I2C Protocol – Data Transfer ....................................... 4
Data Validity ................................................................ 5
START Condition (S) ................................................... 5
STOP Condition (P) ..................................................... 5
Repeated START (Sr) ................................................. 5
Byte Format ................................................................. 5
Acknowledge / No-acknowledge ................................. 5
High-Speed Mode (Hs-mode) ..................................... 6
Slave Device Address ................................................. 7
Write Protection (WP) .................................................. 9
AutoStore Operation .................................................... 9
Hardware STORE and HSB pin Operation ................. 9
Hardware RECALL (Power-Up) ................................ 10
Write Operation ......................................................... 10
Read Operation ......................................................... 10
Memory Slave Access ............................................... 10
RTC Registers Slave Access .................................... 14
Control Registers Slave ............................................. 16
Serial Number ................................................................. 18
Serial Number Write .................................................. 18
Serial Number Lock ................................................... 18
Serial Number Read .................................................. 18
Device ID ......................................................................... 19
Executing Commands Using Command Register ..... 19
Real Time Clock Operation ............................................ 20
nvTIME Operation ..................................................... 20
Clock Operations ....................................................... 20
Reading the Clock ..................................................... 20
Setting the Clock ....................................................... 20
Backup Power ........................................................... 20
Stopping and Starting the Oscillator .......................... 20
Calibrating the Clock ................................................. 21
Alarm ......................................................................... 21
Watchdog Timer ........................................................ 21
Programmable Square Wave Generator ................... 22
Power Monitor ........................................................... 22
Backup Power Monitor .............................................. 22
Interrupts ................................................................... 22
Interrupt Register ....................................................... 22
Flags Register ........................................................... 23
RTC External Components ....................................... 24
PCB Design Considerations for RTC ............................ 25
Layout requirements .................................................. 25
Maximum Ratings ........................................................... 30
Operating Range ............................................................. 30
DC Electrical Characteristics ........................................ 30
Data Retention and Endurance ..................................... 31
Thermal Resistance ........................................................ 31
AC Test Loads and Waveforms ..................................... 32
AC Test Conditions ........................................................ 32
RTC Characteristics ....................................................... 32
AC Switching Characteristics ....................................... 33
Switching Waveforms .................................................... 33
nvSRAM Specifications ................................................. 34
Switching Waveforms .................................................... 34
Software Controlled STORE/RECALL Cycles .............. 35
Switching Waveforms .................................................... 35
Hardware STORE Cycle ................................................. 36
Switching Waveforms .................................................... 36
Ordering Information ...................................................... 37
Ordering Code Definitions ......................................... 37
Package Diagram ............................................................ 38
Acronyms ........................................................................ 39
Document Conventions ................................................. 39
Units of Measure ....................................................... 39
Document History Page ................................................. 40
Sales, Solutions, and Legal Information ...................... 43
Worldwide Sales and Design Support ....................... 43
Products .................................................................... 43
PSoC Solutions ......................................................... 43
Document Number: 001-54391 Rev. *M
Page 2 of 43


Part Number CY14E101I
Description 1-Mbit (128 K x 8) Serial (I2C) nvSRAM
Maker Cypress Semiconductor
Total Page 30 Pages
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