CY14E101J Datasheet | Cypress

Features - - CY14C101J CY14B101J, CY14E101J 2 1-Mbit nonvolatile static random access memory (nv SRAM) - Internally organized as 128 K × 8 - STORE to Quantum Trap nonvolatile elements initiated automatically on power-down (Auto Store) or by using I2C mand (Software STORE) or HSB pin (Hardware STORE) - RECALL to SRAM initiated on power-up (Power-Up RECALL) or by I2C mand (Software RECALL) - Automatic STORE on power-down with a small capacitor (except for CY14X101J1) High reliability - - - Industry standard configurations - Operating voltages: - CY14C101J: VCC = 2.4 V to 2.6 V - CY14B101J: VCC = 2.7 V to 3.6 V - CY14E101J: VCC = 4.5 V to 5.5 V - Industrial temperature - 8- and 16-pin small outline integrated circuit (SOIC) package - Restriction of hazardous substances (Ro HS) pliant Overview The Cypress CY14C101J/CY14B101J/CY14E101J bines a 1-Mbit nv SRAM[1] with a nonvolatile element in each memory cell. The memory is organized as 128 K words of 8 bits each. The embedded nonvolatile elements incorporate the Quantum Trap technology, creating the world’s most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the Quantum Trap cells provide highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at power-down (except for CY14X101J1). On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation). The STORE and RECALL operations can also be initiated by the user through I2C mands. - Infinite read, write, and RECALL cycles 1 million STORE cycles to Quantum Trap Data retention: 20 years at 85 °C - High speed I2C interface - Industry standard 100 k Hz and 400 k Hz speed - Fast-mode Plus: 1 MHz speed - High speed: 3.4 MHz - Zero cycle delay reads and writes Write protection - Hardware protection using Write Protect (WP) pin - Software block protection for 1/4, 1/2, or entire array I2C access to special functions - Nonvolatile...