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CY14E512PA - 512-Kbit (64 K x 8) SPI nvSRAM

This page provides the datasheet information for the CY14E512PA, a member of the CY14B512PA 512-Kbit (64 K x 8) SPI nvSRAM family.

Description

9 Status Register 10 Read Status Register (RDSR) Instruction 10 Fast Read Status Register (FAST_RDSR) Instruction 10 Write Status Register (WRSR) Instruction 10 Write Protection and Block Protection 11 Write Enable (WREN) Instruction 11 Write Disable (WRDI) Instruction 12 Block Protection 1

Features

  • 512-Kbit nonvolatile static random access memory (nvSRAM).
  • Internally organized as 64 K × 8.
  • STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using SPI instruction (Software STORE) or HSB pin (Hardware STORE).
  • RECALL to SRAM initiated on power-up (Power-Up RECALL) or by SPI instruction (Software RECALL).
  • Automatic STORE on power-down with a small capacitor.
  • High reliability.
  • Infinite read, write, and RECALL cycles.

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Datasheet preview – CY14E512PA

Datasheet Details

Part number CY14E512PA
Manufacturer Cypress
File Size 1.25 MB
Description 512-Kbit (64 K x 8) SPI nvSRAM
Datasheet download datasheet CY14E512PA Datasheet
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Full PDF Text Transcription

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CY14C512PA CY14B512PA CY14E512PA 512-Kbit (64 K × 8) SPI nvSRAM with Real Time Clock 512-Kbit (64 K × 8) SPI nvSRAM with Real Time Clock Features 512-Kbit nonvolatile static random access memory (nvSRAM) ❐ Internally organized as 64 K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using SPI instruction (Software STORE) or HSB pin (Hardware STORE) ❐ RECALL to SRAM initiated on power-up (Power-Up RECALL) or by SPI instruction (Software RECALL) ❐ Automatic STORE on power-down with a small capacitor ■ High reliability ❐ Infinite read, write, and RECALL cycles ❐ 1 million STORE cycles to QuantumTrap ❐ Data retention: 20 years at 85 C ■ Real time clock (RTC) ❐ Full-featured RTC ❐ Watchdog timer ❐ Clock alarm with programmable interrupts
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