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Cypress Semiconductor Electronic Components Datasheet

CY26121 Datasheet

Spread Spectrum Clock Generator

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CY26121
PacketClock™ Spread Spectrum Clock
Generator
Features
Integrated phase-locked loop (PLL)
Low jitter, high-accuracy outputs
3.3V operation
25-MHz input frequency
66.66-MHz or 33.33-MHz selectable output frequency (orig,
-3,-11,-31)
33.33-MHz or 25-MHz selectable output frequency (-2,-21)
Benefits
High-performance PLL tailored for Spread Spectrum appli-
cation
Meets critical timing requirements in complex system designs
Enables application compatibility
Works with commonly available crystal or driven reference
Downspread Spread Spectrum with 30-kHz nominal
modulation frequency
Table 1. Frequency Table for CLKA-D
Part Number
CY26121
CY26121-2
CLKSEL=0
66.66 MHz
33.33 MHz
CY26121-3
CY26121-11
CY26121-21
CY26121-31
66.66 MHz
66.66 MHz
33.33 MHz
66.66 MHz
CLKSEL=1
33.33
25.00
33.33
33.33
25.00
33.33
Spread%
–2.8%
–2.8%
–1.4%
–2.8%
–2.8%
–1.4%
Parallel Crystal Load
6 pF
6 pF
6 pF
15 pF
15 pF
15 pF
Logic Block Diagram
25 MHz XIN
XOUT
SSON
OSC.
PLL
with
Modulation Control
Flash Configuration
CLKSEL
www.DataSheet4U.com
VDD AVDD AVSS VSS
OUTPUT
MULTIPLEXER
AND
DIVIDERS
VDDL
CLKA
CLKB
CLKC
CLKD
VSSL
REF
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 38-07350 Rev. *A
• San Jose, CA 95134-1709 • 408-943-2600
Revised May 22, 2008
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Cypress Semiconductor Electronic Components Datasheet

CY26121 Datasheet

Spread Spectrum Clock Generator

No Preview Available !

CY26121
Pin Configuration
Figure 1. CY26121, 16-pin TSSOP
XIN
VDD
AVDD
CLKSEL
AVSS
VSSL
CLKA
CLKB
1
2
3
4
5
6
7
8
16 XOUT
15 NC
14 REF
13 VSS
12 CLKD
11 VDDL
10 SSON
9 CLKC
Table 2. Pin Definitions
Name
XIN
VDD
AVDD
CLKSEL
CLKSEL
AVSS
VSSL
CLK(A:D)
SSON
VDDL
VSS
REF
NC
XOUT[1]
Pin Number
1
2
3
4 (orig., -11,-3,-31)
4 (-2, -21)
5
6
7,8,9,12
10
11
13
14
15
16
Description
Reference input Or Crystal Input
3.3V Voltage Supply
3.3V Analog Voltage
0 = 66.66MHz out, 1 = 33.33 MHz Out. Weak pull up.
0 = 33.33MHz out, 1 = 25 MHz Out. Weak pull up.
Analog Ground
CLK Ground
Clock Outputs at VDDL level
Spread Spectrum Enable pin 0 = SS off; 1 = SS on. Weak pull up.
3.3V Clock Voltage Supply
Ground
Reference Output at VDD Level
No Connect
Crystal Output
www.DataSheet4U.com
Document #: 38-07350 Rev. *A
Page 2 of 7
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Part Number CY26121
Description Spread Spectrum Clock Generator
Maker Cypress Semiconductor
Total Page 7 Pages
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