CY7C006A Overview
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CY7C006A Key Features
- True dual-ported memory cells which allow simultaneous access of the same memory location
- 16K × 8 organization (CY7C006A)
- 0.35-micron CMOS for optimum speed/power
- High-speed access: 20 ns
- Low operating power
- Active: ICC = 180 mA (typical)
- Standby: ISB3 = 0.05 mA (typical)
- Fully asynchronous operation
- Automatic power-down
- Expandable data bus to 16 bits or more using Master/Slave chip select when using more than one device