CY7C1511KV18 - (CY7C15xxKV18) 72-Mbit QDR II SRAM 4-Word Burst Architecture

Cypress Semiconductor

The CY7C1511KV18 by Cypress Semiconductor is a (CY7C15xxKV18) 72-Mbit QDR II SRAM 4-Word Burst Architecture. Below is the official datasheet preview.

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CY7C1511KV18 (CY7C15xxKV18) 72-Mbit QDR II SRAM 4-Word Burst Architecture by Cypress Semiconductor - Datasheet Preview — Official preview page of the **CY7C1511KV18** (CY7C15xxKV18) 72-Mbit QDR II SRAM 4-Word Burst Architecture datasheet (Cypress Semiconductor).

Datasheet Details

Part number	CY7C1511KV18
Manufacturer	Cypress Semiconductor
File Size	843.99 KB
Description	(CY7C15xxKV18) 72-Mbit QDR II SRAM 4-Word Burst Architecture
Datasheet	CY7C1511KV18_CypressSemiconductor.pdf
Additional preview pages of the CY7C1511KV18 datasheet.

CY7C1511KV18 Product details

Description

The CY7C1526KV18, CY7C1513KV18, and CY7C1515KV18 are 1.8-V synchronous pipelined SRAMs, equipped with QDR II architecture.

Features

Separate independent read and write data ports.
Supports concurrent transactions.
333 MHz clock for high bandwidth.
Four-word burst for reducing address bus frequency.
Double data rate (DDR) interfaces on both read and write ports (data transferred at 666 MHz) at 333 MHz.
Two input clocks (K and K) for precise DDR timing.
SRAM uses rising edges only.
Two input clocks for output data (C and C) to minimize clock skew and flight time mismatches.
Echo cl.

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Published: Dec 9, 2010 |