D D D D D
32 macrocells in two logic blocks 32 I/O pins 6 dedicated inputs including 2 clock pins No hidden delays High speed
Ċ fMAX Ċ tPD= Ċ tS Ċ tCO=
= 143 MHz 8.5 ns
The CY7C371 is a Flash erasable Complex Programmable Logic Device (CPLD) and is part of the FLASH370 family of highĆdenĆ sity,
Full PDF Text Transcription for CY7C371 (Reference)
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CY7C371. For precise diagrams, and layout, please refer to the original PDF.
7c371: Tuesday, May 26, 1992 Revision: August 9, 1995 CY7C371 UltraLogict 32ĆMacrocell Flash CPLD Features Functional Description D D D D D 32 macrocells in two logic blo...
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atures Functional Description D D D D D 32 macrocells in two logic blocks 32 I/O pins 6 dedicated inputs including 2 clock pins No hidden delays High speed Ċ fMAX Ċ tPD= Ċ tS Ċ tCO= = 143 MHz 8.5 ns The CY7C371 is a Flash erasable Complex Programmable Logic Device (CPLD) and is part of the FLASH370 family of highĆdenĆ sity, highĆspeed CPLDs. Like all members of the FLASH370 family, the CY7C371 is designed to bring the ease of use and high performance of the 22V10 to highĆdensity CPLDs. The 32 macrocells in the CY7C371 are diĆ vided between two logic blocks. Each logic block includes 16 macrocells, a 72 x 86 product term ar
CY7C371 Datasheet
