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CY7C371I - UltraLogic 32-Macrocell Flash CPLD

Datasheet Summary

Description

The CY7C371i is an In-System Reprogrammable Complex Programmable Logic Device (CPLD) and is part of the FLASH370i™ family of high-density, high-speed CPLDs.

I/O15 LOGIC B

Features

  • 32 macrocells in two logic blocks 32 I/O pins Five dedicated inputs including two clock pins In-System Reprogrammable (ISR™) Flash technology.
  • JTAG interface Bus Hold capabilities on all I/Os and dedicated inputs No hidden delays High speed.
  • fMAX = 143 MHz.
  • tPD= 8.5 n3s.
  • tS = 5 ns.
  • tCO = 6 ns Fully PCI-compliant 3.3V or 5.0V I/O operation Available in 44-pin PLCC, and TQFP packages.

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Datasheet preview – CY7C371I

Datasheet Details

Part number CY7C371I
Manufacturer Cypress Semiconductor
File Size 214.24 KB
Description UltraLogic 32-Macrocell Flash CPLD
Datasheet download datasheet CY7C371I Datasheet
Additional preview pages of the CY7C371I datasheet.

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Full PDF Text Transcription

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USE ULTRA37000™ FOR ALL NEW DESIGNS CY7C371i UltraLogic™ 32-Macrocell Flash CPLD Features • • • • • • • 32 macrocells in two logic blocks 32 I/O pins Five dedicated inputs including two clock pins In-System Reprogrammable (ISR™) Flash technology — JTAG interface Bus Hold capabilities on all I/Os and dedicated inputs No hidden delays High speed — fMAX = 143 MHz — tPD= 8.5 n3s — tS = 5 ns — tCO = 6 ns Fully PCI-compliant 3.3V or 5.0V I/O operation Available in 44-pin PLCC, and TQFP packages Pin-compatible with the CY7C372i designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs.
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