CY7C371 Overview
D D D D D 32 macrocells in two logic blocks 32 I/O pins 6 dedicated inputs including 2 clock pins No hidden delays High speed Ċ fMAX Ċ tPD= Ċ tS Ċ tCO= = 143 MHz 8.5 ns The CY7C371 is a Flash erasable plex Programmable Logic Device (CPLD) and is part of the FLASH370 family of highĆdenĆ sity, highĆspeed CPLDs. Like all members of the FLASH370 family, the CY7C371 is designed to bring the ease of use and high...
CY7C371 Key Features
- Revised August 1995