Datasheet Summary
74i
UltraLogic™ 128-Macrocell Flash CPLD
Features
- -
- - 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable™ (ISR™) Flash technology
- JTAG interface
- Bus Hold capabilities on all I/Os and dedicated inputs
- No hidden delays
- High speed
- fMAX = 125 MHz
- tPD = 10 ns
- tS = 5.5 ns
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- -
- tCO = 6.5 ns Fully PCI pliant 3.3V or 5.0V I/O operation Available in 84-pin PLCC, 84-pin CLCC, and 100-pin TQFP packages Pin patible with the CY7C373i
Functional Description
The CY7C374i is an In-System Reprogrammable plex Programmable Logic Device (CPLD) and is part of the FLASH370i™ family of high-density,...