Datasheet Summary
USE ULTRA37000™ FOR ALL NEW DESIGNS
UltraLogic™ 64-Macrocell Flash CPLD
Features
- 64 macrocells in four logic blocks
- 32 I/O pins
- Five dedicated inputs including two clock pins
- In-System Reprogrammable (ISR™) Flash technology
- JTAG interface
- Bus Hold capabilities on all I/Os and dedicated inputs
- No hidden delays
- High speed
- fMAX = 125 MHz
- tPD = 10 ns
- tS = 5.5 ns
- tCO = 6.5 ns
- Fully PCI pliant
- 3.3V or 5.0V I/O operation
- Available in 44-pin PLCC, TQFP, and CLCC packages
- Pin-patible with the CY7C371i
Functional Description
The CY7C372i is an In-System Reprogrammable plex Programmable Logic Device (CPLD) and is part of the FLASH370i™ family of...