Datasheet Summary
For new designs see CY7C374i
UltraLogic™ 128-Macrocell Flash CPLD
Features
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- - 128 macrocells in eight logic blocks 64 I/O pins 6 dedicated inputs including 4 clock pins Bus Hold capabilities on all I/Os and dedicated inputs No hidden delays High speed
- fMAX = 100 MHz
- tPD = 12 ns
- tS = 6 ns
- tCO = 7 ns
- Electrically Alterable Flash technology
- Available in 84-pin PLCC, 84-pin CLCC, 100-pin TQFP, and 84-pin PGA packages
- Pin patible with the CY7C373
Functional Description
The CY7C374 is a Flash erasable plex Programmable Logic Device (CPLD) and is part of the FLASH370 family of high-density, high-speed CPLDs. Like all members of the FLASH370 family, the...