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CY7C9335A Datasheet SMPTE-259M/DVB-ASI Descrambler/Framer-Controller

Manufacturer: Cypress (now Infineon)

General Description

SMPTE-259M Operation • X9 + X4 + 1 descrambler and NRZI-to-NRZ decoder may be bypassed for raw data output The CY7C9335A is a CMOS integrated circuit designed to decode SMPTE-125M bit-parallel digital characters (or other data formats) using the SMPTE-259M decoding rules.

Following decoding, the characters are framed by locating the 30-bit TRS pattern in the paral

Overview

CY7C9335A SMPTE-259M/DVB-ASI Descrambler/Framer-Controller.

Key Features

  • Fully compatible with SMPTE-259M.
  • Fully compatible with DVB-ASI.
  • Operates from a single +5V supply.
  • 100-pin TQFP package.
  • Decodes 10-bit parallel digital streams for 27M characters/sec (270 Mbits/sec serial).
  • Operates with CY7B9334 SMPTE HOTLink deserializer/receiver The inputs of the CY7C9335A are designed to be directly mated to a CY7B9334 HOTLink receiver, which converts the SMPTE-259M compatible high-speed serial data stream into 10-bit.