ICD2051
Key Features
- Two independent clock outputs ranging from 320 kHz to 100 MHz
- Individually programmable PLLs use 22-bit serial word
- Low-skew ÷1,÷2, and ÷4 CLKA outputs
- Phase-locked loop oscillator input derived from external low-frequency reference clock (1 MHz - 25 MHz) or external crystal (2 MHz - 24 MHz)
- Three-state control disables outputs for test purposes (optional)
- 5V operation
- Low-power, high-speed CMOS technology
- Available in 16-pin SOIC package Functional Description The ICD2051 Programmable Clock Generator offers two fully user-programmable phase-locked loops in a single package. The outputs may be changed “on the fly” to any desired frequency value between 320 kHz and 100 MHz. The ICD2051 is ideally suited for any design where one or more multiple or varying frequencies are required, thus replacing more expensive metal can oscillators. The capability to dynamically change the output frequency adds a whole new degree of freedom for the electrical engineer. Some examples of the uses for this device include: laptop computers, in which slowing the speed of operation can mean less power consumption or speeding it up can mean faster operation; graphics board dot clocks to allow dynamic synchronization with different brands of monitors or display formats; and on-board test strategies where the ability to skew a system’s desired frequency (for example ±10%) allows worst case evaluations. Logic Block Diagram f(REF) XTALIN ÷q 7 7 3 Phase Detector Charge Pump VCO XTALOUT Internal Loop Filter ÷2p post-VCO divider select µCode Decode VCO range select 4 Phase-Locked Loop Oscillator Section A
