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Cypress Semiconductor Electronic Components Datasheet

W532 Datasheet

Peak Reducing EMI Solution

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W532
Features
Frequency Multiplying, Peak Reducing EMI Solution
Table 1. Output Frequency Range Selection
• Cypress PREMIS™ family offering
• Generates an EMI optimized clocking signal at the
output
• Selectable frequency range and multiplication factor
• Single 1.25% or 5% center spread output
• Integrated loop filter components
• Operates with a 3.3V or 5V supply
• Low power CMOS design
• Available in 16-pin SOIC
Key Specifications
Supply Voltages: ........................................VDD = 3.3V ±0.3V
or VDD = 5V ±10%
Frequency Range: .........................15 MHz Fout 120 MHz
Cycle to Cycle Jitter: ......................................... 150 ps (typ.)
Output Duty Cycle: ............................... 40/60% (worst case)
Output Rise and Fall Time ................................... 5 ns (max.)
OR2
0
0
1
1
OR1
0
1
0
1
Output Range
(Multiplication Factor Selection)
reserved
15 MHz FIN 30 MHz
30 MHz FIN 60 MHz
60 MHz FIN 120 MHz
Table 2. Modulation Width Selection
MW Output
0 Favg + 0.625% Fout Favg 0.625%
1 Favg + 2.5% Fout Favg 2.5%
Table 3. Input Frequency Range Selection
IR2 IR1
00
01
10
11
Input Range
reserved
15 MHz FIN 30 MHz
30 MHz FIN 60 MHz
60 MHz FIN 120 MHz
Simplified Block Diagram
3.3V or 5.0V
XTAL
Input
X1
X2
W532
Spread Spectrum
Output
(EMI suppressed)
3.3V or 5.0V
Pin Configuration
SOIC
X1
X2
AVDD
*OR1
NC
AGND
^OR2
*SSON#
1
2
3
4
5
6
7
8
16 VDD
15 GND
14 IR1^
13 IR2^
12 SSOUT
11 GND
10 VDD
9 MW*
Oscillator or
Reference Input
X1
W532
Spread Spectrum
Output
(EMI suppressed)
Notes:
1. ^ pins have internal pull-up
2. * pins have internal pull-down
PREMIS is a trademark of Cypress Semiconductor.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-07253 Rev. *A
Revised December 28, 2002


Cypress Semiconductor Electronic Components Datasheet

W532 Datasheet

Peak Reducing EMI Solution

No Preview Available !

W532
Pin Definitions
Pin Name
SSOUT
CLKIN or X1
Pin No.
12
1
NC or X2
SSON#
2
8
MW 9
IR1:2
14, 13
OR1:2
VDD
GND
NC
4, 7
3, 10, 16
6, 11, 15
5
Pin
Type
O
I
I
I
I
I
I
P
G
NC
Pin Description
Output Modulated Frequency: Frequency modulated signal. Frequency of
the output is selected as shown in Table 1.
Crystal Connection or External Reference Frequency Input: This pin has
dual functions. It may either be connected to an external crystal, or to an
external reference clock.
Crystal Connection: Input connection for an external crystal. If using an ex-
ternal reference signal, this pin must be left unconnected.
Spread Spectrum Control (Active LOW): Asserting this signal (active LOW)
turns the internal modulation waveform on. This pin has an internal pull-down
resistor.
Modulation Width Selection: When Spread Spectrum feature is turned on,
these pins are used to select the amount of variation and peak EMI reduction
that is desired on the output signal (see Table 2).
Reference Frequency Selector: Logic level provided at this input indicates
to the internal logic what range the reference frequency is in and determines
the factor by which the device multiplies the input frequency. Refer to Table 3.
These pins have internal pull-up resistors.
Output Frequency Selection Bits: These pins select the frequency of oper-
ation for the output. Refer to Table 1. OR1: DOWN - OR2: UP.
Power Connection: Connected to 3.3V or 5V power supply.
Ground Connection: Connect all ground pins to the common ground plane.
No Connect: Leave this pin floating.
Document #: 38-07253 Rev. *A
Page 2 of 8


Part Number W532
Description Peak Reducing EMI Solution
Maker Cypress Semiconductor
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W532 Datasheet PDF





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