* Double-data-rate architecture; two data transfers per clock cycle
* The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture
* Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the re
P3R1GE3JGF Datasheet (2.91 MB)
P3R1GE3JGF
Deutron Electronics
2.91 MB
1g bits ddr2 sdram.
DATA SHEET 1G bits DDR2 SDRAM P3R1GE3JGF(128M words × 8 bits) P3R1GE4JGF(64M words × 16 bits) Specifications Density: 1G bits Org.
📁 Related Datasheet
P3R1GE4JGF 1G bits DDR2 SDRAM (Deutron Electronics)
P3-1A1500 Reed Sensor (Cosmo)
P3-1A1600 Reed Sensor (Cosmo)
P3-1A1700 Reed Sensor (Cosmo)
P30 Definite Purpose Magnetic Contactor (Tyco)
P3000AA61L SIDACtor Device (Littelfuse)
P3002AA SIDACtor Protection Thyristors (Littelfuse)
P3002AB SIDACtor Protection Thyristors (Littelfuse)
P3002AC SIDACtor Protection Thyristors (Littelfuse)
P3002ACMC SIDACtor Protection Thyristors (Littelfuse)
