DFPSQRT - Floating Point Pipelined Square Root Unit

PIN clk rst en datai[31:0] datao[31:0] ofo ufo ifo TYPE Input Input Input Input DESCRIPTION Global system clock Global system reset Enable computing Data bus input Output Data bus output Output Overflow flag Output Underflow flag Output Invalid result flag All trademarks mentioned in this docume

• Full IEEE-754 compliance Single precision real format support Simple interface No programming required 9 levels pipelining 24-bit accuracy, 6 fractional decimal digits Results available at every clock Fully configurable Delivery the IP Core updates, minor and major versions changes Delivery the documentation updates Phone & email support.