MAS281
Key Features
- Figure 1 depicts the interconnection of these chips via the substrate while Figure 2 depicts the architectural details within each chip
- Unit (MMU), this address space may be expanded to a full 1Mword
- Furthermore, this configuration provides write and access lock and key protection down to 4K-word blocks
- By also configuring the MA31751 as a Block Protect Unit (BPU), write protection may be extended down to 1K-word blocks
- In addition to implementing all of the required features of MIL-STD-1750A, the MAS281 also incorporates a number of optional features
- Interval timers A and B as well as a triggergo counter are provided
- Those mands not directly decoded are output for decoding by external logic in accordance with the XIO and VIO protocols of MIL-STD1750A
- 1.1 EXECUTION UNIT (EU) The EU provides the putational resources for the MAS281