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EM Microelectronic

EM6680 Datasheet Preview

EM6680 Datasheet

Ultra Low Power 8-pin Microcontroller

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R EM MICROELECTRONIC - MARIN SA
EM6680
Ultra Low Power 8-pin Microcontroller
Features
‰ True Low Power:
4.0 µA active mode
3.0 µA standby mode
0.65 µA sleep mode
@ 1.5V, 32kHz, 25°C
‰ Low Supply Voltage 1.2 V to 3.6 V
‰ No external component needed
‰ Available in TSSOP-8/14, SO-8/14 packages and die
‰ 4-bit ADC or 12 levels Supply Voltage Level
Detector (SVLD)
‰ Max 4 (5*) outputs with 2 high drive outputs of 10mA
‰ Max. 5 (6*) inputs
‰ Sleep Counter Reset (automatic wake-up from sleep
mode (EM patent))
‰ Mask ROM 1536 × 16 bits
‰ RAM 80 × 4 bits
‰ Internal RC oscillator 32 kHz – 800 kHz
‰ 2 clocks per instruction cycle
‰ 72 basic instructions
‰ External CPU clock source possible
‰ Watchdog timer (2 sec)
‰ Power-On-Reset with Power-Check on Start-Up
‰ 3 wire serial port , 8 bit, master and slave mode
‰ Universal 10-bit counter, PWM, event counter
‰ Prescaler down to 1 Hz (freq. = 32 kHz)
‰ Frequency output 1Hz, 2048 Hz, CpuClk, PWM
‰ 6 internal interrupt sources ( 2×10-bit counter, 2×
prescaler, SVLD, Serial Interface)
‰ 2 external interrupt sources (port A)
Description
The EM6680 is an ultra-low voltage, low power
microcontroller coming in a package as small as 8-pin
TSSOP and working up to 0.4 MIPS. It comes with an
integrated 4-bit ADC and 2 high current drive outputs of
10mA and it requires no external component. It has a
sleep counter reset allowing automatic wake-up from sleep
mode. It is designed for use in battery-operated and field-
powered applications requiring an extended lifetime. A
high integration level make it an ideal choice for cost
sensitive applications.
The EM6680 contains the equivalent of 3kB mask ROM
and a RC oscillator with frequencies between 32 and
800kHz selectable by metal option. It also has a power-
on reset, watchdog timer, 10 bit up/down counter, PWM
and several clock functions.
Tools include windows-based simulator and emulator. A
ROMless version is also available for validation in
development stage (EMDK6680A).
Figure 1. Architecture
Stable
RC oscillator
32 - 128kHz
Prescaler
10-Bit Univ
Count/Timer
Interrupt
Controller
ROM
1536 x 16Bit
RAM
80 x 4Bit
Core
EM6600
VDD
VDD
Power Supply
Power on
Reset
Sleep Counter
Reset
Watchdog
4-bit ADC
SVLD check
Port A
Serial Interface
PA0 PA1 PA2
PA3
Reset
PA4 *PA5
PA1 & PA2:
high current
drive outputs
* PA5 available only
in 14-pin package
and in die
Figure 2. Pin Configuration
TSSOP-8, SO-8
PA0 1
PA1 2
PA2 3
PA3 4
8 VDD
EM6680 7 VREG
6 PA4 (Reset,ADC)
5 VSS
TSSOP-14, SO-14
NC 1
14 NC
PA0 2
13 VDD
PA1 3
12 VREG
PA2 4 EM6680 11 PA5
PA3 5
10 PA4 (Reset,ADC)
NC 6
9 VSS
NC 7
8 NC
Typical Applications
‰ Household appliances
‰ Safety and security devices
‰ Automotive controls
‰ Sensor interfaces
‰ Watchdog
‰ Intelligent ADC
‰ Driver (LED, triac)
Copyright © 2005, EM Microelectronic-Marin SA
1
www.emmicroelectronic.com




EM Microelectronic

EM6680 Datasheet Preview

EM6680 Datasheet

Ultra Low Power 8-pin Microcontroller

No Preview Available !

R
EM6680 at a glance
‰ Power Supply
- Low voltage low power architecture
including internal voltage regulator
- 1.2 V to 3.6 V supply voltage
- 4.0 µA in active mode
- 3.5 µA in standby mode
- 0.35 µA in sleep mode
@ 1.5V, 32kHz, 25°C
‰ RAM
- 80 x 4 bit, directly addressable
‰ ROM
- 1536 x 16 bit (~3k Byte), metal mask programmable
‰ CPU
- 4-bit RISC architecture
- 2 clock cycles per instruction (CPI=2)
- 72 basic instructions
‰ Main Operating Modes and Resets
- Active mode (CPU is running)
- Standby mode (CPU in halt, peripherals running)
- Sleep mode (no clock, data kept)
- Initial Power-On-Reset with Power-Check
- Watchdog reset (logic)
- Reset terminal (software option on PA[3/4])
- Sleep Counter reset from Sleep mode
- Wakeup on change from Sleep mode
‰ Prescaler
- Divider (4 stages) to best fit CPU clock (32kHz – 1MHz
to 32kHz system clock to keep peripherals timing close
to specification
- 15 stage system clock divider from 32kHz down to 1Hz
- 2 Interrupt requests (3 different frequencies)
- Prescaler reset (4kHz to 1Hz)
‰ 8-Bit Serial Interface
- 3 wire (Clock, DataIn , DataOut) master/slave mode
- READY output during data transfer
- Maximum shift clock is equal to the main system clock
- Interrupt request to the CPU after 8 bit data transfer
- Supports different serial formats
- pins shared with general 4 bit PA[3:0] I/O port
‰ Oscillator
- RC Oscillator range: 32/50kHz to 500/800kHz
(metal selectable from 32/50, 64/100, 128/200, 256/400
or 500/800 kHz typ. for CPU clock)
- No external components are necessary
- Temperature compensated
- External clock source possible from PA[1]
EM6680
‰ 4(5)-Bit I/O PA[3:0] & PA[4] / PA[5]*
- Direct input read on the port terminals
- 2 Debounce function available muxed on 4 inputs
- 2 Interrupt request on positive or negative edge
- Pull-up or pull-down or none selectable by register,
except PA[4] where pullup/down is mask selection
- 2 Test variables (software) for conditional jumps
- PA[1] and PA[3/4] are inputs for the event counter
- PA[3/4] Reset input (register selectable)
- All outputs can be put tri-state (default)
- Selectable pull-downs in input mode
- CMOS or Nch. open drain outputs
- Weak pull-up selectable in Nch. open drain
mode
‰ 4-bit ADC & Voltage Level Det. (SVLD)
- External voltage compare from PA[4] input possible (low
resolution 4 bit AD converter)
-12 different levels from 1.2 V to 3.0 V for SVLD
- Used for Power Check after POR (1.25V or 1.85V)
- Busy flag during measure
- Interrupt generated if SVLD measurement low
‰ 10-Bit Universal Counter
- 10, 8, 6 or 4 bit up/down counting
- Parallel load
- Event counting (PA[1] or PA[3/4])
- 8 different input clocks
- Full 10 bit or limited (8, 6, 4 bit) compare function
- 2 interrupt requests (on compare and on 0)
- Hi-frequency input on PA[1] and PA[3/4] or CPUclk/2
- Pulse width modulation (PWM) output
‰ Interrupt Controller
- 2 external and 6 internal interrupt request sources
- Each interrupt request can individually be masked
- Each interrupt flag can individually be reset
- Automatic reset of each interrupt request after read
- General interrupt request to CPU can be disabled
- Automatic enabling of general interrupt request flag
when going into HALT mode
‰ Sleep Counter Reset (SCR)
- wake up the EM6680 from sleep mode
- 4 timings selectable by register
- Inhibit SCR by register
‰ Package form available
- TSSOP-8/14
- SO-8/14
- Die form (9 pin possible due to additional I/O pin)
NB: All frequencies written in this document are related to a typical system clock of 32 kHz !
Copyright © 2005, EM Microelectronic-Marin SA
2
www.emmicroelectronic.com


Part Number EM6680
Description Ultra Low Power 8-pin Microcontroller
Maker EM Microelectronic
Total Page 30 Pages
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