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F59L1G81MB - 1 Gbit (128M x 8) 3.3V NAND Flash Memory

Download the F59L1G81MB datasheet PDF. This datasheet also covers the F59L1G81MB-25TG2M variant, as both devices belong to the same 1 gbit (128m x 8) 3.3v nand flash memory family and are provided as variant models within a single manufacturer datasheet.

General Description

The device is a 128Mx8bit with spare 4Mx8bit capacity.

The device is offered in 3.3V Vcc Power Supply.

Its NAND cell provides the most cost-effective solution for the solid state mass storage market.

Key Features

  • Voltage Supply: 3.3V (2.7V~3.6V).
  • Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit.
  • Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte.
  • Page Read Operation - Page Size: (2K + 64) Byte - Random Read: 25us (Max. ) - Serial Access: 25ns (Min. ) (3.3V).
  • Memory Cell: 1bit/Memory Cell.
  • Fast Write Cycle Time - Program time: 300us - typical - Block Erase time: 4ms - typical.
  • Command/Address/Da.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (F59L1G81MB-25TG2M-ESMT.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number F59L1G81MB
Manufacturer ESMT
File Size 2.01 MB
Description 1 Gbit (128M x 8) 3.3V NAND Flash Memory
Datasheet download datasheet F59L1G81MB Datasheet

📁 Similar Datasheet

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Other Datasheets by ESMT

Part Number Description
F59L1G81MB-25BCG2M 1 Gbit (128M x 8) 3.3V NAND Flash Memory
F59L1G81MB-25BG2M 1 Gbit (128M x 8) 3.3V NAND Flash Memory
F59L1G81MB-25BUG2M 1 Gbit (128M x 8) 3.3V NAND Flash Memory
F59L1G81MB-25TG2M 1 Gbit (128M x 8) 3.3V NAND Flash Memory
F59L1G81MA-25BCG2Y 1 Gbit (128M x 8) 3.3V NAND Flash Memory

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
ESMT Flash FEATURES  Voltage Supply: 3.3V (2.7V~3.6V)  Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit  Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte  Page Read Operation - Page Size: (2K + 64) Byte - Random Read: 25us (Max.) - Serial Access: 25ns (Min.) (3.3V)  Memory Cell: 1bit/Memory Cell  Fast Write Cycle Time - Program time: 300us - typical - Block Erase time: 4ms - typical  Command/Address/Data Multiplexed I/O Port  Hardware Data Protection - Program/Erase Lockout During Power Transitions F59L1G81MB (2M) 1 Gbit (128M x 8) 3.