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QL2007 Datasheet pASIC 2 FPGA Combining Speed

Manufacturer: Unknown Manufacturer

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Datasheet Details

Part number QL2007
Manufacturer Unknown Manufacturer
File Size 331.88 KB
Description pASIC 2 FPGA Combining Speed
Download QL2007 Download (PDF)

Overview

www.DataSheet4U.com 3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev.

Key Features

  • -3.3V and 5.0V operation with low standby power -I/O pin-compatibility between different devices in the same packages -PCI compliant (at 5.0V), full speed 33 MHz implementations -High design security provided by security fuses QL2007 Block Diagram 480 Logic Cells 3-25 DataSheet 4 U . com www. DataSheet4U. com QL2007.

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