(128 X 16)
D0018 ILL B01.1
The XL9020 is ideal for high volume applications requiring
low power and low density data storage. It uses a cost-
effective, space saving 8-pin package, and readily inter-
faces with standard microprocessors and popular
end. For a WRITE operation, a 16 bit data field is required
following the 8 bit address field. The device requires an
active LOW CS in order to be selected. Each instruction
must be preceded by a HIGH-to-LOW transition of CS
before the 4 bit start sequence is given. Prior to the 4 bit
start sequence (1010), inputs of all other logical sequence
Candidate applications include alarm devices, air condi-
tioners, TV’s, VCRs, cameras, computer terminals, smart
cards, electronic locks, meters, robotics and telephones,
to name just a few.
During the self-timed internal programming cycle that
accompanies a write, the SK clock is deactivated. It is
needed only when instructions or data are being passed
to or from the memory.
ENDURANCE AND DATA RETENTION
The XL9020 is designed for applications requiring up to
100,000 write cycles per bit. It provides 100 years of
secure data retention, with or without power applied.
Any of the four modes (read, write, write enable, write
disable) may be specified. The write time is set by internal
timer, and determination of whether a write operation is in
progress or not can be made from the status of the
The XL9020 is a clocked serial port compatible E2PROM.
It operates on a single power supply ranging from 2.7V to
5.5V and it has an on-chip voltage generator to provide
the high voltage needed during a programming operation.
Input data is latched on the rising edge of the clock(SK),
and data is output on the falling edge of the clock.
Data is grouped in 8-bit bytes. The beginning 8 bits specify
the mode, the next 8 bits specify the address, and subse-
quent 16 bits specify the I/O data. Each instruction sent to
the device includes a 4 bit start sequence, 1010, a 4 bit
opcode and an 8 bit address including a dummy bit at the
The read instruction is the only instruction that outputs
serial data on the DO pin. After the read instruction and
address have been decoded, data is transferred from the
selected memory register into the output register. The
output on DO changes during the HIGH to LOW transition
After a write instruction and its address have been de-
coded, the device expects 16 bits of data. These are to be
transferred into the specific memory register which has
previously been automatically erased. After the last data
bit has been clocked into DI on the 32nd clock edge, the