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Elpida Memory

EDJ1116DJBG Datasheet Preview

EDJ1116DJBG Datasheet

1G bits DDR3 SDRAM

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COVER
DATA SHEET
1G bits DDR3 SDRAM
EDJ1108DJBG (128M words × 8 bits)
EDJ1116DJBG (64M words × 16 bits)
Specifications
• Density: 1G bits
• Organization
— 16M words × 8 bits × 8 banks (EDJ1108DJBG)
— 8M words × 16 bits × 8 banks (EDJ1116DJBG)
• Package
— 78-ball FBGA (EDJ1108DJBG)
— 96-ball FBGA (EDJ1116DJBG)
— Lead-free (RoHS compliant) and Halogen-free
• Power supply: VDD = 1.5V ± 0.075V
• Data rate
— 2133Mbps/1866Mbps/1600Mbps/1333Mbps (max)
• 1KB page size (EDJ1108DJBG)
— Row address: A0 to A13
— Column address: A0 to A9
• 2KB page size (EDJ1116DJBG)
— Row address: A0 to A12
— Column address: A0 to A9
• Eight internal banks for concurrent operation
• Interface: SSTL_15
• Burst length (BL): 8 and 4 with Burst Chop (BC)
• Burst type (BT):
— Sequential (8, 4 with BC)
— Interleave (8, 4 with BC)
• /CAS Latency (CL): 5, 6, 7, 8, 9, 10, 11, 13, 14
• /CAS Write Latency (CWL): 5, 6, 7, 8, 9, 10
• Precharge: auto precharge option for each burst
access
• Driver strength: RZQ/7, RZQ/6 (RZQ = 240)
• Refresh: auto-refresh, self-refresh
• Refresh cycles
— Average refresh period
7.8µs at 0°C TC +85°C
3.9µs at +85°C < TC +95°C
• Operating case temperature range
— TC = 0°C to +95°C
Features
• Double-data-rate architecture: two data transfers per
clock cycle
• The high-speed data transfer is realized by the 8 bits
prefetch pipelined architecture
• Bi-directional differential data strobe (DQS and /DQS)
is transmitted/received with data for capturing data at
the receiver
• DQS is edge-aligned with data for READs; center-
aligned with data for WRITEs
• Differential clock inputs (CK and /CK)
• DLL aligns DQ and DQS transitions with CK transitions
• Commands entered on each positive CK edge; data
and data mask referenced to both edges of DQS
• Data mask (DM) for write data
• Posted /CAS by programmable additive latency for
better command and data bus efficiency
• On-Die Termination (ODT) for better signal quality
— Synchronous ODT
— Dynamic ODT
— Asynchronous ODT
• Multi Purpose Register (MPR) for pre-defined pattern
read out
• ZQ calibration for DQ drive and ODT
• /RESET pin for Power-up sequence and reset function
• SRT range:
— Normal/extended
• Programmable Output driver impedance control
• Seamless BL4 access with bank-grouping
— Applied only for DDR3-1333 and 1600
Document. No. E1729E30 (Ver. 3.0)
Date Published August 2012 (K) Japan
Printed in Japan
URL: http://www.elpida.com
©Elpida Memory, Inc. 2010-2012




Elpida Memory

EDJ1116DJBG Datasheet Preview

EDJ1116DJBG Datasheet

1G bits DDR3 SDRAM

No Preview Available !

EDJ1108DJBG, EDJ1116DJBG
Ordering Information
Part number
EDJ1108DJBG-MU-F
EDJ1108DJBG-JS-F
EDJ1108DJBG-GN-F
EDJ1108DJBG-DJ-F
EDJ1116DJBG-MU-F
EDJ1116DJBG-JS-F
EDJ1116DJBG-GN-F
EDJ1116DJBG-DJ-F
Die
revision
J
J
Organization
(words × bits)
128M × 8
64M × 16
Internal
banks
8
8
JEDEC speed bin
(CL-tRCD-tRP)
DDR3-2133L (14-14-14)
DDR3-1866M (13-13-13)
DDR3-1600K (11-11-11)
DDR3-1333H (9-9-9)
DDR3-2133L (14-14-14)
DDR3-1866M (13-13-13)
DDR3-1600K (11-11-11)
DDR3-1333H (9-9-9)
Package
78-ball FBGA
96-ball FBGA
Part Number
Elpida Memory
Type
D: Packaged Device
Product Family
J: DDR3
Density / Bank
11: 1Gb / 8-bank
Organization
08: x8
16: x16
Power Supply, Interface
D: ,1.5V, SSTL_15
E D J 11 08 D J BG - MU- F
Environment code
F: Lead Free (RoHS compliant)
and Halogen Free
Speed
MU: DDR3-2133L (14-14-14)
JS: DDR3-1866M (13-13-13)
GN: DDR3-1600K (11-11-11)
DJ: DDR3-1333H (9-9-9)
Package
BG: FBGA
Die Rev.
Operating Frequency
Speed
Grade
Frequency (Mbps)
CL5 CL6 CL7
-MU 800 1066
-JS 667 800 1066
-GN 667 800 1066
-DJ 667 800 1066
CL8
1066
1066
1066
1066
CL9
1333
1333
1333
1333
CL10
1333
1333
1333
1333
CL11
1600
1600
1600
CL13
1866
1866
CL14
2133
speed bin
(CL-tRCD-tRP)
DDR3-2133
(14-14-14)
DDR3-1866
(13-13-13)
DDR3-1600
(11-11-11)
DDR3-1333
(9-9-9)
Detailed Information
For detailed electrical specification and further information, please refer to the DDR3 SDRAM General Functionality
and Electrical Condition data sheet (E1926E) and Addendum data sheet (E1928E).
Data Sheet E1729E30 (Ver. 3.0)
2



Part Number EDJ1116DJBG
Description 1G bits DDR3 SDRAM
Maker Elpida Memory
Total Page 30 Pages
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