* Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
* Pulsed interface
* Possible to assert random column address in every c.

The µPD4564441, 4564841, 4564163 are high-speed 67,108,864-bit synchronous dynamic random-access memories, organized as 4,194,304 × 4 × 4, 2,097,152 × 8 × 4, 1,048,576 ×16 × 4 (word × bit × bank), respectively. The synchronous DRAMs achieved high-spe.

UPD4564163G5

UPD4564323

UPD4564441

UPD4564841

UPD4503B

UPD45128163

UPD45128441

UPD45128841

UPD4516161

UPD4516161A

UPD4516161D

UPD4516421

UPD4516821