Description
S1C17555/565/955/965 can operate at high speed with low power and it has large address area..
Features
- S
CPU CPU core Multiplier/Divider (COPRO) S1C17555 S1C17565 S1C17955 S1C17965 Seiko Epson original 16-bit RISC CPU core S1C17.
- 16-bit × 16-bit multiplier.
- 16-bit × 16-bit + 32-bit multiply and accumulation unit.
- 16-bit ÷ 16-bit divider 32-bit × 32-bit multiplier + 72-bit adder 2 inputs and 1 output 12K bytes
FSA.
- 1 Multiply and accumulation unit Data access Address space Embedded Flash memory Capacity Erase/program count Other
128K bytes (for both instructions a.