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Etron Technology

EM68C16CWQG Datasheet Preview

EM68C16CWQG Datasheet

64M x 16 bit DDRII Synchronous DRAM

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EtronTech
EM68C16CWQG
64M x 16 bit DDRII Synchronous DRAM (SDRAM)
Advance (Rev. 1.5, Apr. /2016)
Features
JEDEC Standard Compliant
JEDEC standard 1.8V I/O (SSTL_18-compatible)
Power supplies: VDD & VDDQ = +1.8V 0.1V
Operating temperature: TC = 0~85°C
Supports JEDEC clock jitter specification
Fully synchronous operation
Fast clock rate: 333/400/533 MHz
Differential Clock, CK & CK#
Bidirectional single/differential data strobe
- DQS & DQS#
8 internal banks for concurrent operation
4-bit prefetch architecture
Internal pipeline architecture
Precharge & active power down
Programmable Mode & Extended Mode registers
Posted CAS# additive latency (AL): 0, 1, 2, 3, 4, 5, 6
WRITE latency = READ latency - 1 tCK
Burst lengths: 4 or 8
Burst type: Sequential / Interleave
DLL enable/disable
Off-Chip Driver (OCD)
- Impedance Adjustment
- Adjustable data-output drive strength
On-die termination (ODT)
RoHS compliant
Auto Refresh and Self Refresh
8192 refresh cycles / 64ms
84-ball 8 x 12.5 x 1.2mm (max) FBGA package
- Pb and Halogen Free
Overview
The EM68C16C is a high-speed CMOS Double-Data-
Rate-Two (DDR2), synchronous dynamic random -
access memory (SDRAM) containing 1024 Mbits in a
16-bit wide data I/Os. It is internally configured as a 8-
bank DRAM, 8 banks x 8Mb addresses x 16 I/Os. The
device is designed to comply with DDR2 DRAM key
features such as posted CAS# with additive latency,
Write latency = Read latency -1, Off-Chip Driver (OCD)
impedance adjustment, and On Die Termination(ODT).
All of the control and address inputs are synchronized
with a pair of externally supplied differential clocks. Inputs
are latched at the cross point of differential clocks (CK
rising and CK# falling) All I/Os are synchronized with a
pair of bidirectional strobes (DQS and DQS#) in a source
synchronous fashion. The address bus is used to convey
row, column, and bank address information in RAS #, CAS#
multiplexing style. Accesses begin with the registration of a
Bank Activate command, and then it is followed by a
Read or Write command. Read and write accesses to
the DDR2 SDRAM are 4 or 8-bit burst oriented; accesses
start at a selected location and continue for a programmed
number of locations in a programmed sequence. Operating
the eight memory banks in an interleaved fashion allows
random access operation to occur at a higher rate than
is possible with standard DRAMs. An auto precharge
function may be enabled to provide a self-timed row
precharge that is initiated at the end of the burst sequence.
A sequential and gapless data rate is possible depending
on burst length, CAS latency, and speed grade of the
device.
Table 1. Ordering Information
Part Number
Clock Frequency Data Rate
EM68C16CWQG-18H
533MHz
1066Mbps/pin
EM68C16CWQG-25H
400MHz
800Mbps/pin
EM68C16CWQG-3H
333MHz
667Mbps/pin
WQ: indicates 8 x 12.5 x 1.2mm FBGA Package
G: indicates Generation Code
H: indicates Pb and Halogen Free
Power Supply
VDD 1.8V, VDDQ 1.8V
VDD 1.8V, VDDQ 1.8V
VDD 1.8V, VDDQ 1.8V
Package
FBGA
FBGA
FBGA
Etron Technology, Inc.
No. 6, Technology Rd. V, Hsinchu Science Park, Hsinchu, Taiwan 30078, R.O.C.
TEL: (886)-3-5782345 FAX: (886)-3-5778671
Etron Technology, Inc. reserves the right to change products or specification without notice.




Etron Technology

EM68C16CWQG Datasheet Preview

EM68C16CWQG Datasheet

64M x 16 bit DDRII Synchronous DRAM

No Preview Available !

EtronTech
Table 2. Speed Grade Information
Speed Grade
Clock Frequency
DDR2-1066
DDR2-800
DDR2-667
533MHz
400MHz
333MHz
CAS Latency
7
5
5
EM68C16CWQG
tRCD (ns)
13.125
12.5
15
tRP (ns)
13.125
12.5
15
Figure 1. Ball Assignment (FBGA Top View)
123
A VDD NC VSS
789
VSSQ UDQS# VDDQ
B DQ14 VSSQ UDM
C VDDQ DQ9 VDDQ
UDQS.
VDDQ
VSSQ
DQ8
DQ15
VDDQ
D DQ12 VSSQ DQ11
DQ10 VSSQ DQ13
E VDD NC VSS
VSSQ LDQS# VDDQ
F DQ6 VSSQ LDM
LDQS VSSQ DQ7
G VDDQ DQ1 VDDQ
VDDQ DQ0 VDDQ
H DQ4 VSSQ DQ3
DQ2 VSSQ DQ5
J VDDL VREF VSS
VSSDL CK
VDD
K
CKE
WE#
RAS# CK#
ODT
L BA2
BA0
BA1
CAS# CS#
M A10 A1
A2 A0 VDD
N VSS
A3
A5
A6 A4
P A7 A9
A11 A8 VSS
R VDD
A12
NC
NC NC
Rev. 1.5
2
Apr. /2016


Part Number EM68C16CWQG
Description 64M x 16 bit DDRII Synchronous DRAM
Maker Etron Technology
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