XRK799J93 driver equivalent, intelligent dynamic clock switch pll clock driver.
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Fully Integrated PLL Intelligent Dynamic Clock Switch LVPECL Clock Outputs LVCMOS Control I/O 3.3V Operation 32-Lead TQFP Packaging
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Information section for more detail) e. Specification holds for a clock switch between two signals no greater than ±π ou.
The XRK799J93 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals from which it generates 5 new differential LVPECL clock outputs. Two of the output pairs regenerate .
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