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Exar Corporation

XRT83SL314 Datasheet Preview

XRT83SL314 Datasheet

14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT

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PRELIMINARY
XRT83SL314
NOVEMBER 2003
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. P1.0.5
GENERAL DESCRIPTION
The XRT83SL314 is a fully integrated 14-channel
short-haul line interface unit (LIU) that operates from
a single 3.3V power supply. Using internal
termination, the LIU provides one bill of materials to
operate in T1, E1, or J1 mode independently on a per
channel basis with minimum external components.
The LIU features are programmed through a standard
microprocessor interface. EXAR’s LIU has patented
high impedance circuits that allow the transmitter
outputs and receiver inputs to be high impedance
when experiencing a power failure or when the LIU is
powered off. Key design features within the LIU
optimize 1:1 or 1+1 redundancy and non-intrusive
monitoring applications to ensure reliability without
using relays.
The on-chip clock synthesizer generates T1/E1/J1
clock rates from a selectable external clock frequency
and has five output clock references that can be used
for external timing (8kHz, 1.544Mhz, 2.048Mhz, nxT1/
J1, nxE1).
Additional features include RLOS, a 16-bit LCV
counter for each channel, AIS, QRSS generation/
detection, Network Loop Code generation/detection,
TAOS, DMO, and diagnostic loopback modes.
APPLICATIONS
T1 Digital Cross Connects (DSX-1)
ISDN Primary Rate Interface
CSU/DSU E1/T1/J1 Interface
T1/E1/J1 LAN/WAN Routers
Public Switching Systems and PBX Interfaces
T1/E1/J1 Multiplexer and Channel Banks
Integrated Multi-Service Access Platforms (IMAPs)
Integrated Access Devices (IADs)
Inverse Multiplexing for ATM (IMA)
Wireless Base Stations
FIGURE 1. BLOCK DIAGRAM OF THE XRT83SL314
TCLK
TPOS
TNEG
RCLK
RPOS
RNEG
ICT
TEST
TxON
1 of 14 Channels
NLCD
Generation
Driver
Monitor
HDB3/B8ZS
Encoder
Tx Jitter
Attenuator
Timing
Control
Tx Pulse
Shaper &
Pattern Gen
Remote
Loopback
Digital
Loopback
QRSS
Generation
& Detection
Line
Driver
Analog
Loopback
HDB3/B8ZS
Decoder
Rx Jitter
Attenuator
Clock & Data
Recovery
NLCD
Detection
AIS & LOS
Detector
Peak
Detector
& Slicer
Rx
Equalizer
Rx Equalizer
Control
Test
Microprocessor
Interface
Programmable Master
Clock Synthesizer
TTIP
TRING
RTIP
RRING
DMO
RLOS
8kHzOUT
MCLKE1out
MCLKT1out
MCLKE1Nout
MCLKT1Nout
RxON
RxTSEL
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com




Exar Corporation

XRT83SL314 Datasheet Preview

XRT83SL314 Datasheet

14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT

No Preview Available !

XRT83SL314
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. P1.0.5
PRELIMINARY
FEATURES
Fully integrated 14-Channel short haul transceivers
for T1/J1 (1.544MHz) and E1 (2.048MHz)
applications.
Receiver line attenuation indication output in 1dB
steps.
Loss of signal (RLOS) according to ITU-T G.775/
ETS300233 (E1) and ANSI T1.403 (T1/J1).
T1/E1/J1 short haul and clock rate are per port
selectable through software without changing
components.
Programmable receive slicer threshold (45%, 50%,
55%, or 68%) for improved receiver interference
immunity.
Internal Impedance matching on both receive and
transmit for 75(E1), 100(T1), 110(J1), and
120(E1) applications are per port selectable
through software without changing components.
Power down on a per channel basis with
independent receive and transmit selection.
Five pre-programmed transmit pulse settings for T1
short haul applications.
Arbitrary Pulse Generators for both T1 and E1
modes.
On-Chip transmit short-circuit protection and
limiting protects line drivers from damage on a per
channel basis.
Independent Crystal-Less digital jitter attenuators
(JA) with 32-Bit or 64-Bit FIFO for the receive and
transmit paths
Programmable data stream muting upon RLOS
detection.
On-Chip HDB3/B8ZS encoder/decoder with an
internal 16-bit LCV counter for each channel.
On-Chip digital clock recovery circuit for high input
jitter tolerance.
QRSS pattern generator and detection for testing
and monitoring.
Error and bipolar violation insertion and detection.
Transmit all ones (TAOS) and in-band network loop
up and loop down code generation.
Automatic loop code detection for remote loopback
activation.
Supports local analog, remote, digital, and dual
loopback modes.
On-Chip frequency multiplier generates T1 or E1
master clocks from a variety of external clock
sources (8, 16, 56, 64, 128, 256kHz and 1X, 2X,
4X, 8X T1 or E1)
Driver failure monitor output (DMO) alerts of
possible system or external component problems.
Transmit outputs and receive inputs may be "High"
impedance for protection or redundancy
applications on a per channel basis.
Low Power dissipation: 170mW per channel (50%
density).
250mW per channel maximum power dissipation
(100% density).
Single 3.3V supply operation (3V to 5V I/O
tolerant).
304-Pin TBGA package
-40°C to +85°C Temperature Range
Support for automatic protection switching.
1:1 and 1+1 protection without relays.
Supports gapped clocks for mapper/multiplexer
applications.
Receive monitor mode handles 0 to 29dB resistive
attenuation (flat loss) along with 0 to 6dB cable loss
for both T1 and E1.
PRODUCT ORDERING INFORMATION
PRODUCT NUMBER
XRT83SL314IB
PACKAGE TYPE
304 Lead TBGA
OPERATING TEMPERATURE RANGE
-40°C to +85°C
2


Part Number XRT83SL314
Description 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
Maker Exar Corporation
Total Page 30 Pages
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