| Part number | 74LS11 |
|---|---|
| Download | 74LS11 Datasheet (PDF) |
| File Size | 46.02 KB |
| Manufacturer | Fairchild |
| Description | Triple 3-Input AND Gate |
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| Manufacturer | Part Number | Description |
|---|---|---|
Hitachi Semiconductor |
74LS112 | Dual J-K Negative-edge-triggered Flip-Flops |
Motorola Semiconductor |
74LS112A | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
|
Motorola Semiconductor |
74LS114A | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
This device contains three independent gates each of which performs the logic AND function. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Y = ABC Inputs A X X L H B X L X H C L X X H Output Y L L L H H = HIGH Logic Level L = LOW Logic Level X = Either LOW or HIGH Logic Level © 2000 Fairchild Semiconductor Corporation DS006350 .fairchildsemi.
