s Designed specifically for high speed: Memory decoders Data transmission systems s DM74S138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and/o.

requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize.

These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effe.

74S133

74S134

74S135

74S138

74S10

74S112

74S140

74S15

74S153

74S157

74S158

74S161

74S163