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CD4007C - Dual Complementary Pair Plus Inverter

General Description

The CD4007C consists of three complementary pairs of Nand P-channel enhancement mode MOS transistors suitable for series/shunt applications.

All inputs are protected from static discharge by diode clamps to VDD and VSS.

Key Features

  • s Wide supply voltage range: 3.0V to 15V s High noise immunity: 0.45 VCC (typ. ) Ordering Code: Order Number Package Number Package.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CD4007C Dual Complementary Pair Plus Inverter October 1987 Revised January 1999 CD4007C Dual Complementary Pair Plus Inverter General Description The CD4007C consists of three complementary pairs of Nand P-channel enhancement mode MOS transistors suitable for series/shunt applications. All inputs are protected from static discharge by diode clamps to VDD and VSS. For proper operation the voltages at all pins must be constrained to be between VSS − 0.3V and VDD + 0.3V at all times. Features s Wide supply voltage range: 3.0V to 15V s High noise immunity: 0.45 VCC (typ.) Ordering Code: Order Number Package Number Package Description CD4007CM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.