DM74ALS253 Datasheet | Fairchild Semiconductor

DM74ALS253 3-STATE Dual 1-of-4 Line Data Selector/Multiplexer April 1984 Revised February 2000 DM74ALS253 3-STATE Dual 1-of-4 Line Data Selector/Multiplexer General Description This Data Selector/Multiplexer contains full on-chip decoding to select one-of-four data sources as a result of a unique two-bit binary code at the Select Inputs. Each of the two Data Selector/Multiplexer circuits have their own separate Data and Output Control inputs and a non-inverting 3STATE output buffer. The Output Control inputs, when at the high level, place the corresponding output in the high impedance OFF-State. In order to prevent bus access conflicts, output disable times are shorter than output enable times. The Select input buffers incorporate internal overlap Features to ensure that select input changes do not cause invalid output transients. Features s Advanced oxide-isolated, ion-implanted Schottky TTL process s Switching performance is guaranteed over full temperature and VCC supply range s Pin and functional patible with LS family counterpart s Improved output transient handling capability s Output control circuitry incorporates power-up 3-STATE feature Ordering Code: Order Number DM74ALS253M DM74ALS253N Package Number M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Select Inputs B X L L L L H H H H A X L L H H L L H H C0 X L H X X X X X X C1 X X X L H X X X X C2 X X X X X L H X X C3 X X X X X X X L H Data Inputs Output Control G H L L L L L L L L Y Z L H L H L H L H Output Address inputs A and B are mon to both sections H = HIGH Level L = LOW Level X = Don't Care Z = High Impedance © 2000 Fairchild Semiconductor Corporation DS006215 .fairchildsemi. Logic Diagram .fairchi...