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DM74LS03 - Quad 2-Input NAND Gates

General Description

This device contains four independent gates each of which performs the logic NAND function.

The open-collector outputs require external pull-up resistors for proper logical operation.

Pull-Up Resistor Equations Where: N1 (IOH) = total maximum output high current for all outputs tied to pull-up resistor N2 (IIH) = total maximum input high current for all inputs tied to pull-up resistor N3 (IIL) = total maximum input low current for all inputs tied to pull-up resistor Ordering Code: Order Number DM74LS03M DM74LS03N Package Number M14A N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel.

Overview

DM74LS03 Quad 2-Input NAND Gates with Open-Collector Outputs August 1986 Revised March 2000 DM74LS03 Quad 2-Input NAND Gates with Open-Collector.