56F8013 Datasheet | Freescale Semiconductor

Description of Change Rev 2 Please see http://.freescale. for the most current Data Sheet revision. 56F8013 Technical Data, Rev. 2 2 Freescale Semiconductor Preliminary .. 56F8013 General Description - Up to 32 MIPS at 32MHz core frequency - DSP and MCU functionality in a unified, C-efficient architecture - 16KB Program Flash - 4KB Unified Data/Program RAM - One 6-channel PWM module - One 6-channel 12-bit ADC - One Serial munication Interface (SCI) with LIN slave functionality - One Serial Peripheral Interface (SPI) - One 16-bit Quad Timer - One Inter-Integrated Circuit (I2C) Port - puter Operating Properly (COP)/Watchdog - On-Chip Relaxation Oscillator - Integrated Power-On Reset and Low-Voltage Interrupt Module - JTAG/Enhanced On-Chip Emulation (On CE™) for unobtrusive, real-time debugging - Up to 26 GPIO lines - 32-pin LQFP Package RESET 4 VCAP VSS_IO 2 VDDA VSSA PWM Outputs PWM or Timer Port or GPIOA Program Controller and Hardware Looping Unit JTAG/EOn CE Port or GPIOD Digital Reg Analog Reg 16-Bit 56800E Core Low-Voltage Supervisor Bit Manipulation Unit Address Generation Unit Data ALU 16 x 16 + 36 -> 36-Bit MAC Three 16-bit Input Registers Four 36-bit...