MC33780
Overview
- Two Independent DBUS I/Os
- Common SPI Interface for All Operations
- Open-Drain Interrupt Output with Pull-up
- Maskable Interrupts for Send and Receive Data Status
- Automatic Message Cyclical Redundancy Checking (CRC) Generation and Checking
- Four-Stage Transmit and Receive Buffers
- 8- to 16-Bit Messages with 0- to 8-Bit CRC
- Independent Frequency Spreading for Each Channel
- Pb-Free Packaging Designated by Suffix Code EG 33780
