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  Fujitsu Electronic Components Datasheet  

MB84VD22280FE-70 Datasheet

(MB84VD222x0Fx-70) 32M (X16) FLASH MEMORY & 8M (X16) STATIC RAM

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FUJITSU SEMICONDUCTOR
DATA SHEET
DS05-50308-2E
Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM
CMOS
32M (×16) FLASH MEMORY &
8M (×16) STATIC RAM
MB84VD22280FA-70/MB84VD22290FA-70
MB84VD22280FE-70/MB84VD22290FE-70
s FEATURES
• Power Supply Voltage of 2.7 V to 3.1 V
High Performance
70 ns maximum access time (Flash)
70 ns maximum access time (SRAM)
Operating Temperature
–30°C to +85°C
• Package 59-ball FBGA
s PRODUCT LINE UP
(Continued)
Part No.
Supply Voltage(V)
Max Address Access Time (ns)
MB84VD22280FA/80FE/90FA/90FE
VCCf=
3.0
V
+0.1 V
–0.3 V
VCCs=
3.0
V
+0.1 V
–0.3 V
70 70
Max CE Access Time (ns)
70 70
Max OE Access Time (ns)
30 35
Note: Both VCCf and VCCs must be in recommended operation range when either part is being accessed.
s PACKAGE
59-ball plastic FBGA
(BGA-59P-M02)


  Fujitsu Electronic Components Datasheet  

MB84VD22280FE-70 Datasheet

(MB84VD222x0Fx-70) 32M (X16) FLASH MEMORY & 8M (X16) STATIC RAM

No Preview Available !

MB84VD22280FA/FE-70/MB84VD22290FA/FE-70
(Continued)
— FLASH MEMORY
• Simultaneous Read/Write Operations (Dual Bank)
FlexBankTM*1
Bank A : 4 Mbit (8 KB × 8 and 64 KB × 7)
Bank B : 12 Mbit (64 KB × 24)
Bank C : 12 Mbit (64 KB × 24)
Bank D : 4 Mbit (64 KB × 8)
Two virtual Banks are chosen from the combination of four physical banks
Host system can program or erase in one bank, and then read immediately and simultaneously from the other
bank with zero latency between read and write operations.
Read-while-erase
Read-while-program
• Minimum 100,000 Write/Erase Cycles
Sector Erase Architecture
Eight 4K word and sixty-three 32K word sectors in word mode
Any combination of sectors can be concurrently erased. Also supports full chip erase.
Boot Code Sector Architecture
MB84VD22280: Top sector
MB84VD22290: Bottom sector
Embedded EraseTM*2 Algorithms
Automatically pre-programs and erases the chip or any sector
Embedded ProgramTM*2 Algorithms
Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit Feature for Detection of Program or Erase Cycle Completion
Ready-Busy Output (RY/BY)
Hardware method for detection of program or erase cycle completion
Automatic Sleep Mode
When addresses remain stable, automatically switch themselves to low power mode.
Low VCCf Write Inhibit 2.5 V
HiddenROM Region
256 byte of HiddenROM, accessible through a new “HiddenROM Enable” command sequence
Factory serialized and protected to provide a secure electronic serial number (ESN)
WP/ACC Input Pin
At VIL, allows protection of “outermost” 2 × 8 bytes on boot sectors, regardless of sector protection/unprotection
status.
At VIH, allows removal of boot sector protection
At VACC, increases program performance
Erase Suspend/Resume
Suspends the erase operation to allow a read in another sector within the same device
• Please refer to “MBM29DL32TF/BF” Datasheet in Detailed Function
— SRAM
Power Dissipation
Operating: 50 mA Max
Standby: 15 µA Max
• Power Down Features using CE1s and CE2s
• Data Retention Supply Voltage: 1.5 V to 3.1 V
• CE1s and CE2s Chip Select
• Byte Data Control: LB (DQ7 to DQ0), UB (DQ15 to DQ8)
*1 : FlexBankTM is a trademark of Fujitsu Limited, Japan.
*2 : Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.
2


Part Number MB84VD22280FE-70
Description (MB84VD222x0Fx-70) 32M (X16) FLASH MEMORY & 8M (X16) STATIC RAM
Maker Fujitsu Media Devices
Total Page 30 Pages
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