MB86831 Key Features
- IU (integer unit) Maximum operating frequency : 120 MHz SPARC architecture V8E conforming With 32-bits general register
- Instruction cash The entry lock function is supported
- Data cache No cash controlling function supported The entry lock function is supported
- BIU (bus interface unit) Purifetchi baffa :1 Write buffer :4 The burst mode is supported Programmable chip selection fun
- With internal clock multiplication circuit
- Sleep mode (low power consumption mode) supported
- With DRAM controller (except on the MB86836)
- With interrupt request controller (IRC)
- On-chip general-purpose 16-bit timer (MB86836 only):1 channel (equivalent to the MB86942)