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GS71108ATP Datasheet Preview

GS71108ATP Datasheet

128K x 8 1Mb Asynchronous SRAM

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GS71108ATP/J/SJ/U
SOJ, TSOP, FP-BGA
Commercial Temp
Industrial Temp
Features
128K x 8
1Mb Asynchronous SRAM
7, 8, 10, 12 ns
3.3 V VDD
Center VDD and VSS
SOJ & TSOP-II 128K x 8-Pin Configuration
• Fast access time: 7, 8, 10, 12 ns
• CMOS low power operation: 140/120/95/80 mA at minimum
cycle time
• Single 3.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
• Industrial Temperature Option: 40° to 85°C
• Package line up
J: 400 mil, 32-pin SOJ package
TP: 400 mil, 32-pin TSOP Type II package
SJ: 300 mil, 32-pin SOJ package
U: 6 mm x 8 mm Fine Pitch Ball Grid Array package
Description
The GS71108A is a high speed CMOS Static RAM organized
as 131,072 words by 8 bits. Static design eliminates the need
for external clocks or timing strobes. The GS operates on a
single 3.3 V power supply and all inputs and outputs are TTL-
compatible. The GS71108A is available in a 6 mm x 8 mm
Fine Pitch BGA package, as well as in 300 mil and 400 mil
SOJ and 400 mil TSOP Type-II packages.
A3 1
32 A4
A2 2
31 A5
A1 3
30 A6
A0 4
29 A7
CE 5 32-pin
28 OE
DQ1
DQ2
6
7 400 mil SOJ
27 DQ8
26 DQ7
VDD 8
&
25 VSS
VSS 9 300 mil SOJ 24 VDD
DQ3
DQ4
WE
10
11
&
12 400 mil TSOP II
23
22
21
DQ6
DQ5
A8
A16 13
20 A9
A15 14
19 A10
A14 15
18 A11
A13 16
17 A12
Packages J, TP, and SJ
Fine Pitch BGA 128K x 8-Bump Configuration
123456
Pin Descriptions
Symbol
A0A16
DQ1DQ8
CE
WE
OE
VDD
VSS
NC
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
Ground
No connect
A NC OE A2 A6 A7 NC
B DQ1 NC A1 A5 CE DQ8
C DQ2 NC A0 A4 NC DQ7
D VSS NC NC A3 NC VDD
E VDD NC NC NC NC VSS
F DQ3 NC A14 A11 DQ5 DQ6
G DQ4 NC A15 A12 WE A8
H NC A10 A16 A13 A9 NC
Package U
6 mm x 8 mm, 0.75 mm Bump Pitch
Top View
Rev: 1.04a 10/2002
1/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.




GSI Technology

GS71108ATP Datasheet Preview

GS71108ATP Datasheet

128K x 8 1Mb Asynchronous SRAM

No Preview Available !

Block Diagram
Truth Table
CE OE
HX
LL
LX
LH
Note: X: “H” or “L”
A0 Row
Decoder
Address
Input
Buffer
A16
CE
WE
OE
Control
Memory Array
Column
Decoder
I/O Buffer
DQ1 DQ8
WE DQ1 to DQ8
X Not Selected
H Read
L Write
H High Z
GS71108ATP/J/SJ/U
VDD Current
ISB1, ISB2
IDD
Rev: 1.04a 10/2002
2/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.


Part Number GS71108ATP
Description 128K x 8 1Mb Asynchronous SRAM
Maker GSI Technology
Total Page 14 Pages
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