GS816136DD-xxxV Description
Applications The GS8161xxD(GT/D)-xxxV is an 18,874,368-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM applicati.
GS816136DD-xxxV Key Features
- IEEE 1149.1 JTAG-patible Boundary Scan
- 1.8 V or 2.5 V core power supply
- 1.8 V or 2.5 V I/O supply
- LBO pin for Linear or Interleaved Burst mode
- Internal input resistors on mode pins allow floating mode pins
- Byte Write (BW) and/or Global Write (GW) operation
- Internal self-timed write cycle
- Automatic power-down for portable