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GS8321V32GE - 36Mb Sync Burst SRAMs

Download the GS8321V32GE datasheet PDF. This datasheet also covers the GS8321V18E variant, as both devices belong to the same 36mb sync burst srams family and are provided as variant models within a single manufacturer datasheet.

Description

Applications The GS8321V18/32/36E is a 37,748,736-bit high performance synchronous SRAM with a 2-bit burst address counter.

Features

  • IEEE 1149.1 JTAG-compatible Boundary Scan.
  • 1.8 V +10%/.
  • 10% core power supply.
  • 1.8 V I/O supply.
  • LBO pin for Linear or Interleaved Burst mode.
  • Internal input resistors on mode pins allow floating mode pins.
  • Byte Write (BW) and/or Global Write (GW) operation.
  • Internal self-timed write cycle.
  • Automatic power-down for portable.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (GS8321V18E-GSITechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number GS8321V32GE
Manufacturer GSI Technology
File Size 720.10 KB
Description 36Mb Sync Burst SRAMs
Datasheet download datasheet GS8321V32GE Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
GS8321V18/32/36E-250/225/200/166/150/133 165-Bump FP-BGA Commercial Temp Industrial Temp 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 250 MHz–133 MHz 1.8 V VDD 1.8 V I/O Features • IEEE 1149.1 JTAG-compatible Boundary Scan • 1.8 V +10%/–10% core power supply • 1.8 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating mode pins • Byte Write (BW) and/or Global Write (GW) operation • Internal self-timed write cycle • Automatic power-down for portable applications • JEDEC-standard 165-bump FP-BGA package • Pb-Free 165-bump BGA package available Functional Description Applications The GS8321V18/32/36E is a 37,748,736-bit high performance synchronous SRAM with a 2-bit burst address counter.
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