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GD32E10x Datasheet

32-bit MCU

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GD32E10x User Manual
GigaDevice Semiconductor Inc.
GD32E10x
ARM® Cortex-M4 32-bit MCU
User Manual
Revision 1.2
( Mar. 2020 )
1




GigaDevice

GD32E10x Datasheet Preview

GD32E10x Datasheet

32-bit MCU

No Preview Available !

GD32E10x User Manual
Table of Contents
Table of Contents.................................................................................................................... 2
List of Figures ....................................................................................................................... 15
List of Tables......................................................................................................................... 22
1. System and memory architecture ........................................................................... 25
1.1. ARM Cortex-M4 processor.................................................................................................. 25
1.2. System architecture ........................................................................................................... 26
1.3. Memory map ..................................................................................................................... 28
1.3.1. Bit-banding.........................................................................................................................................32
1.3.2. On-chip SRAM memory...................................................................................................................33
1.3.3. On-chip flash memory overview .....................................................................................................33
1.4. Boot configuration ............................................................................................................. 33
1.5. Device electronic signature................................................................................................. 34
1.5.1. Memory density information ............................................................................................................35
1.5.2. Unique device ID (96 bits) ............................................................................................................... 35
1.6. System configuration registers ........................................................................................... 36
2. Flash memory controller (FMC) ............................................................................... 37
2.1. Overview ........................................................................................................................... 37
2.2. Characteristics ................................................................................................................... 37
2.3. Function overview.............................................................................................................. 37
2.3.1. Flash memory architecture..............................................................................................................37
2.3.2. Read operations................................................................................................................................38
2.3.3. Unlock the FMC_CTL register ........................................................................................................39
2.3.4. Page erase ........................................................................................................................................ 40
2.3.5. Mass erase ........................................................................................................................................ 41
2.3.6. Main flash programming ..................................................................................................................42
2.3.7. OTP programming ............................................................................................................................44
2.3.8. Option bytes Erase ...........................................................................................................................45
2.3.9. Option bytes modify..........................................................................................................................45
2.3.10. Option bytes description ..................................................................................................................46
2.3.11. Page erase/program protection ...................................................................................................... 47
2.3.12. Security protection ............................................................................................................................47
2.4. Register definition.............................................................................................................. 47
2.4.1. Wait state register (FMC_WS) ........................................................................................................48
2.4.2. Unlock key register (FMC_KEY).....................................................................................................49
2.4.3. Option byte unlock key register (FMC_OBKEY) ..........................................................................49
2


Part Number GD32E10x
Description 32-bit MCU
Maker GigaDevice
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GD32E10x Datasheet PDF






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