GS9020 Datasheet Text
2A Sink/Source Bus Termination Regulator
Product Description
The GS9020 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to ply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requirements.
The regulator is capable of actively sinking or sourcing up to 2A while regulating an output voltage to within 40mV.
The output termination voltage can be tightly regulated to track 1/2VDDQ by two external voltage divider resistors or the desired output voltage can be programmed by externally forcing the REFEN pin voltage.
The GS9020 also incorporates a high-speed differential amplifier to provide ultra-fast response in line/load transient. Other Features include extremely low initial offset voltage, excellent load regulation, current limiting in bi-directions and on-chip thermal shut-down protection.
The GS9020 are available in the PSOP-8...
